EDN

EDN Access–03.14.97 FIFO memories supply the glue for high-speed systems

System designers have long used FIFO memories to couple subsystems with disparate data-transfer rates. Recently, new types of these devices–with new capabilities–have emerged. Know your FIFO choices ...
TechRepublic

Verification of Asynchronous FIFO Using System Verilog

FIFO (First In First Out) is a buffer that stores data in a way that data stored first comes out of the buffer first. Asynchronous FIFO is most widely used in the System-on-Chip (SoC) designs for data ...
EDN

Re-Energizing Input Buffer Schemes: Part 1

A fundamental component of high-speed optical networking equipment designs are a low-cost, high-bandwidth interface for the network processors. Traditionally, designers have implemented these ...
Yahoo Finance

Cypress High-Density FIFO Powers Ikegami HDTV Camera Control Unit and Base Station

SAN JOSE, CA--(Marketwired - Feb 11, 2015) - Cypress Semiconductor Corp. (NASDAQ: CY), the Static Random Access Memory (SRAM) market leader, today announced that Ikegami Tsushinki Corp., the world's ...
Design-Reuse

Making SPI-4.2 Implementations More Efficient: Part 1

The SPI-4.2 interface has quickly achieved the industry-wide recognition and is highly accepted as standard high-speed interface in the networking chip space. However, creating an efficient SPI-4.2 ...